Designing Chip-Level Nanophotonic Interconnection Networks

TitleDesigning Chip-Level Nanophotonic Interconnection Networks
Publication TypeJournal Article
Year of Publication2012
AuthorsBatten, C., Joshi A., Stojanovic V., & Asanović K.
Published inIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Other Numbers3455

Technology scaling will soon enable high-performanceprocessors with hundreds of cores integrated onto a singledie, but the success of such systems could be limited by thecorresponding chip-level interconnection networks. There havebeen many recent proposals for nanophotonic interconnectionnetworks that attempt to provide improved performance andenergy-ef

Bibliographic Notes

IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 2, No. 2, pp. 137-153

Abbreviated Authors

C. Batten, A. Joshi, V. Stojanovi?, and K. Asanovi?

ICSI Research Group


ICSI Publication Type

Article in journal or magazine