An Architecture for Exploiting Multi-Core Processors to Parallelize Network Intrusion Prevention

TitleAn Architecture for Exploiting Multi-Core Processors to Parallelize Network Intrusion Prevention
Publication TypeJournal Article
Year of Publication2009
AuthorsSommer, R., Weaver N., & Paxson V.
Published inConcurrency and Computation: Practice and Experience
Volume21
Issue10
Page(s)1255-1279
Other Numbers2829
Acknowledgment

This work was partially supported by funding provided to ICSI through National Science Foundation grants CNS-0716636 ("Exploiting Multi-Core CPUs for Parallelizing Network Intrusion Prevention"); NSF-0433702 ("CCIED: Center for Internet Epidemiology and Defenses"); CNS: 0627320 ("Approaches to Network Defense Proven in Open Scientific Environments"); OCI: 0334088 ("Viable Network Defense for Scientific Research Institutions"); CNS: 0205519 ("Discrete Models & Algorithms in the Sciences"); and also by a grant from Intel Corporation. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors or originators and do not necessarily reflect the views of the National Science Foundation.

URLhttp://www.icsi.berkeley.edu/pubs/networking/multicore-sarnoff07.pdf
Bibliographic Notes

Concurrency and Computation: Practice and Experience, Vol. 21, Issue 10, pp. 1255-1279

Abbreviated Authors

R. Sommer, N. Weaver, and V. Paxson

ICSI Research Group

Networking and Security

ICSI Publication Type

Article in journal or magazine