Torrent Architecture Manual
Title | Torrent Architecture Manual |
Publication Type | Technical Report |
Year of Publication | 1996 |
Authors | Asanović, K., & Johnson D. |
Other Numbers | 1064 |
Keywords | T0, Torrent, Vector Microprocessor |
Abstract | This manual contains the specification of the Torrent Instruction Set Architecture (ISA). Torrent is a vector ISA designed for digital signal processing applications. Torrent is based on the 32-bit MIPS-II ISA, and this manual is intended to be read as a supplement to the book "MIPS RISC Architecture" by Kane and Heinrich. Torrent is the ISA of the T0 vector microprocessor which is described in the separate "T0 Engineering Data" technical report. |
URL | http://www.icsi.berkeley.edu/ftp/global/pub/techreports/1996/tr-96-056.pdf |
Bibliographic Notes | ICSI Technical Report TR-96-056 |
Abbreviated Authors | K. Asanovic and D. Johnson |
ICSI Publication Type | Technical Report |