Publications

Found 68 results
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Batten, C., Joshi A., Stojanovic V., & Asanović K. (2012).  Designing Chip-Level Nanophotonic Interconnection Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
Batten, C., Joshi A., Stojanovic V., & Asanović K. (2012).  Designing Chip-Level Nanophotonic Interconnection Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
Batten, C., Joshi A., Stojanovic V., & Asanović K. (2013).  Designing Chip-Level Nanophotonic Interconnection Networks.
Asanović, K., Beck J., Feldman J., Morgan N., & Wawrzynek J. (1993).  Designing a Connectionist Network Supercomputer. International Journal of Neural Systems.
Tan, Z., Asanović K., & Patterson D. (2011).  Datacenter-Scale Network Research on FPGAs.
A
Heo, S., Krashinsky R., & Asanović K. (2007).  Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. IEEE Transactions on VLSI Systems. 15(9), 1060-1064.

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