Publications

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Krashinsky, R., Batten C., & Asanović K. (2007).  The Scale Vector-Thread Processor.
Beamer, S., Asanović K., & Patterson D. (2011).  Searching for a Parent Instead of Fighting Over Children: A Fast Breadth-First Search Implementation for Graph500.
Catanzaro, B., Kamil S., Lee Y., Asanović K., Demmel J., Keutzer K., et al. (2009).  SEJITS: Getting Poductivity AND Performance with Selective Embedded JIT Specialization.
Joshi, A., Batten C., Kwon Y-J., Beamer S., Shamim I., Asanović K., et al. (2009).  Silicon-Photonic Clos Networks for Global On-Chip Communication. 124-133.
Asanović, K., Beck J., Kingsbury B., Kohn P., Morgan N., & Wawrzynek J. (1991).  SPERT: A VLIW/SIMD Microprocessor for Artificial Neural Network Computations.
Wawrzynek, J., Asanović K., Kingsbury B., Beck J., Johnson D., & Morgan N. (1996).  SPERT-II: A Vector Microprocessor System and Its Application to Large Problems in Backpropagation Training. IEEE Computer. 29(3), 79-86.
Wawrzynek, J., Asanović K., Kingsbury B., Beck J., Johnson D., & Morgan N. (1995).  SPERT-II: A Vector Microprocessor System and Its Application to Large Problems in Backpropagation Training. Proceedings of the Advances in Neural Information Processing Systems 8 Conference (NIPS 8). 619-625.
Zimmer, B., Toh S. Oon, Vo H., Lee Y., Thomas O., Asanović K., et al. (2012).  SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Transactions on Circuits and Systems-II. 59(12), 853-857.
Asanović, K., & Witchel E.. (2007).  System and technique for fine-grained computer memory protection.

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