Publications

Found 68 results
Author Title [ Type(Desc)] Year
Filters: Author is Krste Asanović  [Clear All Filters]
Conference Paper
Beamer, S., Sun C.., Kwon Y-J., Joshi A., Batten C., Stojanovic V., et al. (2010).  Re-Architecting DRAM Memory Systems with Monolithically Integrated Silicon Photonics. 129-140.
Colmenares, J. A., Bird S., Cook H., Pearce P., Zhu D.., Shalf J., et al. (2010).  Resource Management in the Tessellation Manycore OS.
Paxson, V., Asanović K., Dharmapurikar S., Lockwood J.., Pang R., Sommer R., et al. (2006).  Rethinking Hardware Support for Network Analysis and Intrusion Prevention. Proceedings of the First USENIX Workshop on Hot Topics in Security (HotSec '06).
Joshi, A., Batten C., Kwon Y-J., Beamer S., Shamim I., Asanović K., et al. (2009).  Silicon-Photonic Clos Networks for Global On-Chip Communication. 124-133.
Wawrzynek, J., Asanović K., Kingsbury B., Beck J., Johnson D., & Morgan N. (1995).  SPERT-II: A Vector Microprocessor System and Its Application to Large Problems in Backpropagation Training. Proceedings of the Advances in Neural Information Processing Systems 8 Conference (NIPS 8). 619-625.
Colmenares, J. A., Eads G., Hofmeyr S., Bird S., Moretó M., Chou D., et al. (2013).  Tessellation: Refactoring the OS around Explicit Resource Containers with Continuous Adaptation.
Liu, R., Klues K., Bird S., Hofmeyr S., Asanović K., & Kubiatowicz J. D. (2009).  Tessellation: Space-Time Partitioning in a Manycore Client OS.
Asanović, K. (2007).  Transactors for Parallel Hardware and Software Co-design. Proceedings of the IEEE International High Level Design Validation and Test Workshop 2007 (HLDVT-2007). 140-142.
Journal Article
Heo, S., Krashinsky R., & Asanović K. (2007).  Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. IEEE Transactions on VLSI Systems. 15(9), 1060-1064.
Batten, C., Joshi A., Orcutt J., Khilo A., Moss B., Holzwarth C., et al. (2009).  Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics. IEEE Micro. 29(4), 8-21.
Asanović, K., Beck J., Feldman J., Morgan N., & Wawrzynek J. (1993).  Designing a Connectionist Network Supercomputer. International Journal of Neural Systems.
Batten, C., Joshi A., Stojanovic V., & Asanović K. (2012).  Designing Chip-Level Nanophotonic Interconnection Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
Batten, C., Joshi A., Stojanovic V., & Asanović K. (2012).  Designing Chip-Level Nanophotonic Interconnection Networks. IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2(2), 137-153.
Lee, J. W., Ng M. Cheuk, & Asanović K. (2012).  Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. Journal of Parallel and Distributed Computing. 72(11), 1401-1411.
Asanović, K., & Wittig R.. (2010).  Guest Editors' Introduction: Proceedings of the 21st Symposium on High Performance Chips (Hot Chips 21), Stanford, California. IEEE Micro. 30(2), 5-6.
Krashinsky, R., Batten C., & Asanović K. (2008).  Implementing the Scale Vector-Thread Processor. ACM Transactions on Design Automation of Electronic Systems. 13(3), 
Wawrzynek, J., Patterson D., Oskin M., Lu S-L., Kozyrakis C., Hoe J. C., et al. (2007).  RAMP: Research Accelerator for Multiple Processors. IEEE Micro. 27(2), 46-57.
Wawrzynek, J., Asanović K., Kingsbury B., Beck J., Johnson D., & Morgan N. (1996).  SPERT-II: A Vector Microprocessor System and Its Application to Large Problems in Backpropagation Training. IEEE Computer. 29(3), 79-86.
Zimmer, B., Toh S. Oon, Vo H., Lee Y., Thomas O., Asanović K., et al. (2012).  SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Transactions on Circuits and Systems-II. 59(12), 853-857.
Asanović, K., Bodik R., Demmel J., Keaveny T., Keutzer K., Kubiatowicz J. D., et al. (2009).  A View of the Parallel Computing Landscape. Communications of the ACM. 52(10), 56-67.
Asanović, K., Bodik R., Demmel J., Keaveny T., Keutzer K., Kubiatowicz J. D., et al. (2009).  A View of the Parallel Computing Landscape. Communications of the ACM. 52(10), 56-67.

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